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Read commands ultilizing dfi_rddata_cs_n


In DFI 3.1:

Is the figure 29 Read Commands Utilizing dfi_rddata_cs_n correct?

1. Why is the trddata_en timing is different in RDA and RDB (trddata_en = 1), and RDC (trddata_en=3)?

2. For RDA and RDB, when dfi_rddata_en is asserted for just 3 cycles, but it can clock out 4 valid data on dfi_rddata. Does it mean that when dfi_rddata_cs_n is asserted, dfi_rddata_en does not require to assert the any appropriate cycles? 

Besides, with this spec

"The maximum delay that can be achieved from the assertion of a new chip on dfi_rddata_cs_n and the corresponding dfi_rddata_en is limited to the maximum time the PHY has to make internal adjustments associated with changing the target chip select relative to the read data transfer (trddata_en - tphy_rdcslat),."

In the case of figure 29, trddata_en-tphy_rdcslat will be a negative value?!

Can any one clarify them?

Thanks in advance


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