DFI - ddr-phy.org

DFI Steering Group

DFI Steering Companies

The DFI specification is the result of a collaborative and ongoing effort by industry leaders to describe a common interface between DDR-DRAM memory controller logic designs and DDR DRAM physical interface (DDR PHY) designs.

This effort is made possible through the contributions of experts from recognized leaders in the semiconductor, IP and electronic design automation (EDA) industries. We wish to thank ARM, Avago, Cadence, Intel, Synopsys, STMicroelectronics, Samsung and Uniquify for participating in the development of the DFI Specification.

 

ARM

"ARM is a strong advocate of industry standards and looks forward to supporting the DFI initiative as a founding member."

Nathan Bozeman, director of product marketing, Physical IP, ARM

 

Avago

"Industry-accepted interface specifications simplify development and facilitate interoperability. The DDR-PHY Interface specification will help streamline the integration of memory interface PHYs with high-performance controllers."

Joe Casasanta, Senior Director - Platform Technology Engineering, Avago Technologies

Cadence

“Over the years, DFI has become synonymous with memory subsystem design. A large part of this is attributed to the industry collaboration to ensure DDR IP integration efficiency. It is because of the efforts of the DFI committee members that allows the industry to benefit from this work”

Lou Ternullo, Product Marketing Director Memory and Storage Interface IP, Cadence

 

Intel

"The resources needed to integrate and verify the memory controller logic and PHY designs from third-party vendors represent a significant cost to all parties involved. From a systems perspective, it was essentially defeating the value proposition for outsourcing this type of design IP. We now have a motivated team of experts in this field, pulling together to develop a common specification that will benefit us all."

Bryan K. Jones, Corporate External IP Management, Mobility Group SEG/IPVP, Intel Corporation

 

Samsung

"The collaborative efforts toward a standard PHY interface, that provides a common high-speed DDR PHY solution for added convenience in the interface with various memory controllers, will support ASIC suppliers and customers to maximize development efficiency by reducing both design resources and verification costs."

Steve Park, vice president of ASIC and Foundry Engineering, System LSI, Samsung Electronics

 

ST Microelectronics

"STMicroelectronics is a strong promoter of open industry standards. Parallel DRAM interfaces are increasingly becoming a performance driver for many of our system-on-chip products in computer peripheral, consumer, telecom, and wireless applications. It is therefore natural that ST joins the DFI standardization body, which will benefit our customers with higher performance in our DDR interfaces."

Pierre Dautriche, AMS and PHY IPs director at STMicroelectronics.

 

Uniquify

“Standards bodies such as JEDEC and DFI foster industry collaboration, allowing customers to pick the best solution for their product – mixing in house design, IP vendor offerings and memory devices from multiple suppliers. Uniquify is proud to be a partner in, and contributor to, this ecosystem.”

Brett Murdock, Senior Director, IP Products, Uniquify

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